The present invention is related to high-voltage gate drivers, and in particular to high-voltage level translator circuits.
High-voltage gate drivers are commonly employed to drive the gates of power transistors such as metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs), which are commonly used as switches to control the supply of power to high-power devices (e.g., three-phase motors used in washing machines, dryers, air conditioner fans and compressors, dishwashers, etc.). A common topology is half-bridge driver circuit having a high-side power switch and a low-side power switch. The high-side power switch and low-side power switch are turned On and Off to provide, respectively, a high-voltage output or a low-voltage output.
The high-side switch in a half-bridge driver circuit requires generation of a gate voltage (i.e., control voltage) that extends from a voltage equal to the negative supply voltage (typically equal to ground) to turn the high-side transistor Off to a voltage higher than the high-side supply voltage to turn the high-side transistor On (e.g., 600 V or more). A high-voltage gate driver circuit must therefore be able to convert or translate a control voltage (e.g., 5 V) to a voltage higher than the high-side supply voltage (e.g., 600 V or more). This voltage translation is typically provided by a voltage level translator circuit.
A typical voltage level translator circuit receives a logic-level control signal indicating whether a power switch should be On or Off. A pulse generation circuit generates separate On and Off pulses in response to the logic-level control signal. The On and Off pulses control the gates of separate high-voltage transistors, each connected in series with resistors located between the high-side supply voltage and ground. The series connection of the respective transistors and resistor are connected between the high-side supply voltage and ground, with the gate of each transistor controlled by the logic-level input signal interface between the logic-level control signals (e.g., 5 V) and the high-side supply voltage (e.g., 600 V or more). In response to the On pulse switching On a respective high-voltage transistor, current is drawn from the high-side supply voltage, creating a voltage drop across the resistor that is detected by complimentary metal-oxide semiconductor (CMOS) logic components. In a typical system, the CMOS logic components are connected to float between the input voltage and ground, such that the difference between the high-side supply voltage and the reference voltage for the CMOS logic components remain less than some threshold value (e.g., 15 V) tolerable by the CMOS components.
A problem common to such voltage level translator circuits is the presence of parasitic capacitance between the drain and source of the high-voltage transistors used to interface between the logic-level input signal and the high-side supply voltage. The parasitic capacitances are charged by the high-side supply voltage through the associated resistors, creating a voltage drop that may be misinterpreted by the CMOS logic components as a change in the control signal, resulting in erroneous control of the power switch. It would therefore be desirable to provide a high-voltage level translator that provides reliable control of a high-voltage gate driver despite the presence of transient signals created by the parasitic capacitance associated with the high-voltage transistors employed by the high-voltage level translator.